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| 15th NID Workshop |
Last Updated
<Abril 1, 2019
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| Madrid, Spain |
From 2005-01-31 to 2005-02-02 |
Work Plan of the NID Working Group on Alternative Electronics
from fabrication to performances
Coordinators: Jean-Noel Patillon (Motorola) Arianna Filoramo (CEA-Saclay)
WG on Alternative Electronics Mailing List
The success of the semiconductor industry is based on scalingdown silicon field effect transistor (CMOS) and the resulting increase of density of logic and memory cells. The ITRS predicts an exponential progress (known as « Moore's Law ») of CMOS technology which will continue at least for the next 15 years. By the end of this period, devices with 10-nm gate length will be available.
However, prospects to extend the Moore's law beyond this 10 nm frontier are much more uncertain even if recent studies shows that more sophisticated devices (doublegate transistors) can operate with a gate as short as ~3nm (Sverdlov et al., 2003). In the other hand, such devices will be very sensitive to variations of their physical dimensions. This will put the fabrication of such devices at non commensurable costs which may give opportunity to other types of devices to emerge.
The goal of this Working Group is to address the research of alternative devices that could replace CMOS beyond the 10 to 5 nm frontier providing at least comparable performances but allowing low power consumption and less expensive fabrication. This may include alternative functions for non binary logic fault tolerant architecture.
The working group will address the following items:
1. Nano-objects fabrication & characterization
This will be mainly focused on the fabrication and characterization of low dimensional materials using bottom approach. This includes but is not restricted to:
- nanowires (Si, etc...) and nanotubes (C, BN, ...)
- nanodots including nanoclusters, nanoparticules, etc..
- nanomaterials presenting specific physiscal properties: conducting, semiconducting, magnetical, optical, ....
2. Devices fabrication studies & characterisation
This includes all the methods allowing the fabrication and characterisation of nanodevices with a specific emphasis on new methods as:
- self-assembly
- soft fabrication process (nanoimprint, etc...)
- use of soft material to organize nano-objetcs
- molecular lego
3. New architecture paradygms for nanodevices
Various architecture solutions will be considered including fault-tolerant , analog, neuromorphic, biomimic, ...
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