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Last Updated
11 January, 2006
The ITRS microelectronic roadmap presents a rather clear vision of the near future of microelectronic technology within about ten years. Beyond this date, the MOSFET channel should be shrunken down to 20 nm, near its critical length. Thus to keep on scaling down, microelectronic industry will be up against MOSFET replacement by another elementary component. The far future technology is still open from both point of views of component and fabrication processes. Concerning the short term future of microelectronics, a 'red brick wall' planned in 2006 on Moore's graph : beyond this year there are no known solutions for most technical areas and essential research breakthroughs are needed. A great effort has been devoted this last decade to design and modelling of electronic devices based on quantum effects as alternative solutions for MOSFET replacement in memories. Several ideas were emerging such as molecular switches, single electron devices, etc. In all cases, the fabrication of the key part of the device requires a lithography step with a resolution at sub-10 nm scale. If direct writing lithography processes (top-down approaches) are very promising technologies for demonstrators fabrication, the mass production should undoubtedly rely on self-assembly techniques (bottom-up approaches). In all cases one of the major bottleneck in research development remains in demonstrator fabrication since no technology is presently available for the addressing of an individual function associated to a nano-object (nano to micro bonding). The general purpose of this workshop was to gather researchers interested in the design and fabrication of nano-devices. The association of researchers working in theory, design/modelling and on ultimate lithography processes (top-down, bottom-up and coupling of both techniques) was an opportunity for fruitful discussions. A full day presentation organised in collaboration with the PHANTOMS network was devoted to speakers from private companies, IC producers or equipment suppliers. In addition, EU project reviews and
Working Groups corresponding to the 14th NID Workshop were organised in parallel with the "Ultimate Lithography and Nanodevice
Engineering" Conference.
Lines of gold nanodots
deposited by STM assisted lithography (Courtesy: Prof. Didier
Tonneau, CRMCN (France)) |
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© Phantoms Foundation 2004
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