nanoICT Coordination Action (nanoICT)

  AFSID
Atomic functionalities on silicon devices More info

  CATHERINE
Carbon nAnotube Technology for High-speed nExt-geneRation nano-InterconNEcts More info

  CHIMONO
Nano Optics for Molecules on Chips More info

  GRAND
Graphene-based Nanoelectronic Devices More info

  MOLOC
Molecular Logic Circuits More info

  NABAB
NAnocomputing Building blocks with Acquired Behaviour More info

  NANOICT
Nano-scale ICT Devices and Systems -Coordination Action More info

  SINGLE
Coupling charge transport to internal degrees of freedom at the single molecule level  More info

  VIACARBON
Carbon Nanotubes for Interconnects and Switches  More info

In this project, we wish to take advantage of a fundamental figure-of-merit of the CMOS transistors, the doping modulation, to propose new functionalities arising from the control of a single charge and spin on individual dopants in silicon. The ultimate electrical switch is an atomic point contact. It has been realized and operated several times in laboratories at low temperature under the form of Quantum Point Contacts (QPC), metallic break junctions,molecules placed in an air gap. However a silicon atomic switch has not been realized yet. The devices will be manufactured within a mature technology on state-of-the-art CMOS platforms. Contrarily to bottom-up approaches, there is an unavoidable dispersion in the average number and location of dopants, using masking and implantation CMOS techniques. Nevertheless several approaches are now addressing this question for top-down devices, and this option will be considered. Therefore, we will study single atomic devices, either real (i.e. dopant) or artificial (i.e. quantum dots), with a manageable dispersion by considering three generic cases: devices without dopant, devices with a targeted concentration of one dopant and devices with many dopants. Devices without dopant will be based on ultimate silicon SET. A targeted size of 10 nm is realistic, allowing operation at low temperature (but much above 4.2K). These devices are fully controlled and scalable. Devices with one dopant or two dopants will be identified and selected from their electrical characteristics and then studied thoroughly. Relatively high operating temperatures up to room temperature are expected using donors with large ionization energy. These devices are the smallest possible switches using the silicon technology. Because our ultimate SET present the decisive advantage of an immediate integration in the CMOS, the AFSID project will prove the validity of hybrid SETCMOS approach by building a SET-FET hybrid device on chip.

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CATHERINE will provide a new unconventional concept for local and chip-level interconnects that will bridge ICT beyond the limits of CMOS technology. The main goals of CATHERINE are: G1) to develop an innovative cost-effective and reliable technological solution for high-performance next-generation nanointerconnects. G2) to develop proof-of-concept nanointerconnects to assess and verify the new proposed solution The expected results of CATHERINE are then summarized by the following points: R1) definition of all causal relations within the design-chain "microstructure characteristics – fabrication process – functional properties" R2) development of multiscale multiphysics simulation models for the prediction of the multifunctional performance of the interconnect and for the EMC analysis R3) development of electromagnetic and multifunctional test procedures and experimental characterization methods R4) manufacturing and testing of proof-of-concept samples of nanointerconnects at laboratory level. The final project product will be: P1) integrated data-base for nanointerconnect design P2) proof-of-concept nanointerconnect The new bottom-up approach proposed by CATHERINE consists in realizing CNT-based nano-interconnects for integrated circuit exploiting two different techniques: (i) a template-based CVD technique that allow high control of the growth of perfect aligned arrays of CNTs. The CNTs are synthesized within the pores of properly designed alumina nanostructures. CNTs wall thickness is controlled by the reaction time, the CNT length by the thickness of alumina nanostructures, the CNT external tube diameter by the nanostructures pore size; (ii) CVD growth of CNTs and carbon nanofibers (CNFs) on substrate patterned with nano-imprint lithography. Both techniques do not require electron beam lithography (EBL) for CNTs growth or substrate preparation. The resulting process is cost-effective and can be easily implemented at industrial scale.

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The continuous progress of research in the field of ultracold atoms has led to spectacular developments in the past two decades well illustrated by the increasing number of laboratories all over the world engaged in this research, and by the appearance of dedicated Journals and Conferences. The last five years have seen the emergence of two new and important novelties that brought the field of ultracold-atoms in even greater contact with Information and Communication Technology. On the one hand, ultracold atoms have connected to microelectronic technology thanks to the development of the “AtomChip”, on the other hand new methods have been demonstrated to extend the trapping and control techniques from atoms to molecules. At the same time huge progress has been achieved in the detection and control of single atoms. The objective of the present proposal is to bring together all the new methodologies in the fields of molecular cooling and control with the innovative technological developments brought forward by “AtomChips” as well as nano-optics. What we aim for is a robust and integrable system that would be able to routinely produce, trap, control and detect of molecules in their electronic and vibrational ground state with the ultimate goal manipulating, addressing and functionalizing the individual molecules. This ambitious goal will establish a new class of instruments and techniques perfectly fulfilling the pathfinder role that is at the heart of the proactive initiative which states that “…research will establish the scientific and technological foundations of the technologies and innovations of tomorrow, in terms of knowledge, know-how and the readiness of a vibrant research community”.

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Will graphene really take the semiconductor industry towards the “Beyond CMOS” era? Some answers to this key question are sought through experiment and simulation in a European research project on Graphene-based Nanoelectronic Devices called “GRAND”. The silicon semiconductor industry is the cornerstone of today’s high-tech economy. Through continuous downsizing of components and cost reductions, it has fuelled other industries for the past decades. Today the semiconductor industry is facing fundamental challenges and severe economic constraints, and it is expected that the historic trend of downscaling silicon devices will come to an end in about 10-15 years. The GRAND project partners will investigate graphene towards its applicability for nanoscale “Beyond CMOS” switches and local interconnects. The partners share an extensive scientific and industrial background in nanoelectronic devices and a strong history of collaboration at the European level. The consortium includes experimental, analytic and theoretical groups, each with internationally acknowledged excellence in their field. Graphene provides the decisive potential of increasing computing performance, functionality and communication speed far beyond the expected limits of conventional CMOS technology. The GRAND consortium includes internationally renowned experimental and theoretical groups from academia and industry, forming a comprehensive unit with capabilities far beyond those of the individual partners. In summary, this ensures a tight focus on the exploitation of the project results for the European societies.

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MOLOC – Molecular Logic Circuits seeks to design and provide demonstration of principle, feasibility and significant advantages of logic circuits where the basic element is a single molecule (or assemblies of atoms or molecules) acting in itself as a logic circuit. The functionalities provided by this new post-Boolean approach differ in essential ways from using a molecule as a switch. The approach depends on molecules (or nanostructures, etc) having internal degrees of freedom and multiple (quasi)stationary states by virtue of their confined size. We therefore make an advantage of the nanosize which is imposed by the cardinal technological need to reduce the size of the circuit in order to implement complex logic functions at the hardware level and thereby add new functionalities. Exploratory work has shown that it is possible to address the states of a single molecule either electrically (or electrochemically) or optically and also that it is possible to concatenate the logic operation of two molecules. The partners to MOLOC are cognizant that to go beyond the projected limits of CMOS technology will likely be most productive if it be a surface based approach. All the same, foundational work in the gas or liquid phase is also discussed. MOLOC proposes parallel computing rather than the more familiar sequential model, it proposes to take advantage of inherent internal degrees of freedom of molecules and their dynamics in order to implement finite state machines, machines that can store information to be used later in the computation and to consider circuits where the logic goes beyond Boolean, meaning that variables are not restricted to be either true (=1) or false (=0). Towards its objectives MOLOC proposes to gather a team of European experts in the different and complementary areas of foundational research. The experimental teams can be characterized by the methods used to address (or probe) the molecule. There is also one theoretical work package.

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The research project is a collaborative project - a small / medium scaled focused research project on how to couple charge transport to internal degrees of freedom at the single molecule level. The Scientific aim of the SINGLE project is to understand how single molecules can ultimately be used as transistors, diodes, switches, or memory. SINGLE-collaborators study the influence on electronic conduction of the strength of the electronic coupling between the molecule and the electrode and the intrinsic structure and dynamics of the molecule. The project will be carried out by a collaboration of these institutions, coordinated by Prof. Thomas Bj¯rnholm, Nano-Science Center Copenhagen University: Chalmers Tekniske Hoegskola AB, Technische Universiteit Delft, IBM Research GmbH and Universite de Mons-Hainaut. The strategy is to investigate well-defined test systems experimentally in two and three terminal devices and support the results with theory. Applied aspects are long term with high risk and high potential for possible applications. The work is proceeding in iterative cycles of synthesis, measurements, modeling, and eventually integrating the most promising systems in more advanced prototype systems.

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VIACARBON aims to develop carbon nanotubes for vertical and horizontal interconnects for CMOS nodes of 22 nm and beyond, and for NEMS RF switches. Carbon nanotubes are universally proposed as interconnects because of their huge current carrying capacity of 1E9 A/cm2. However, interconnects also need a low resistance, at least as low as copper. As CNTs are 1-dimensional conductors, they have a minimum quantum resistance of 6 kohms, which can only be reduced by laying many CNTs in parallel. The project aims to grow single wall nanotube mats with density of over 1E13 cm-2, by optimisation of the growth catalyst, and convert this into an industrially compatible technology for both vertical and horizontal interconnects. A second aspect is to fabricate arrays of NEMs as RF switches to support new device functions in the interconnect layer: for reconfigurable interconnects, banks of programmable passives and power current switch.

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